Methods and systems for sub-system power noise suppression design provide a systematic approach to design of an optimal printed wiring board assembly that suppresses system noise.
Electronic data rates of printed wiring board assemblies (PWBAs) have passed into the gigahertz range. As switching speeds increase, there are ever more demands on power management to maintain core voltage stability and suppress switching noise on the power supply lines. The quickened signal transition times cause noise along a wide frequency range on the power lines and result in unacceptable levels of electromagnetic interference (EMI) and signal integrity degradation. As a result, power systems must be designed to compensate for these problems to meet current EMI regulations and maintain signal integrity.
Within a printed wiring board assembly, DC-to-DC converters are used to create a sub-system power source isolated from the main power system. However, this isolated power source is still a power system and must itself suppress noise. Power supply design is evolving and many theories have advanced to address problems. The traditional approach to this problem has been to provide a decoupling capacitance which strongly AC and/or DC couples noisy power lines to a ground and/or a power supply. This has been achieved by providing the wiring board with the addition of numerous discrete decoupling capacitors or the addition of a box filter. However, conventional methods have relied on a trial-and-error testing to find a suitable suppression solution or used off-the-shelf computer programs that provide some guidance, but sub-optimal performance and reliability. The trial-and-error methodology is time-consuming, difficult to achieve an optimized result, and costly.
There is a need for an improved, cost-effective and time-saving process to design a power supply that achieves sufficient power supply noise suppression and signal integrity.